Conductive spacer lightly doped drain (LDD) for hot carrier effect (HCE) control
US5831319A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Oct 21, 1997 |
| Grant date | Nov 3, 1998 |
| Priority date | — |
| Expiry date | Oct 21, 2017 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/66
Abstract
A Metal Oxide Semiconductor Field Effect Transistor (MOSFET) with limited susceptibility to Hot Carrier Effects (HCEs), and a method by which that MOSFET is formed. There is first provided a semiconductor substrate which has a first portion, a second portion adjoining a side of the first portion and a third portion adjoining an opposite side of the first portion. Formed upon the first portion of the semiconductor substrate is a gate oxide layer which has a gate electrode formed and aligned thereupon. The gate electrode has a first sidewall adjoining the second portion of the semiconductor substrate and a second sidewall adjoining the third portion of the semiconductor substrate. Formed upon the first sidewall of the gate electrode and upon the surface of the second portion of the semiconductor substrate adjoining the first sidewall is a conformal oxide layer. The conformal oxide layer has a dose of fluorine atoms incorporated therein. Formed upon the conformal oxide layer at a location above the second portion of the semiconductor substrate and adjoining the first sidewall of the gate electrode is a conductive spacer. Formed into the second portion of the semiconductor substrate at…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.