Inventor · Singapore, SG

Yang Pan

160Patents
23h-index
132Co-inventors
93Inventor score

Filing activity: Aug 3, 1995 → Feb 7, 2024

Most-cited inventions

PatentTitleAreaCited byStatus
US6300177A Method to form transistors with multiple threshold voltages (VT) using a combination of different work function gate materials Electricity 160 Expired
US5595919A Method of making self-aligned halo process for reducing junction capacitance Electricity 129 Expired
US5667424A New chemical mechanical planarization (CMP) end point detection apparatus Electricity 100 Expired
US6461900B1 Method to form a self-aligned CMOS inverter using vertical device integration Electricity 92 Expired
US6747314B2 Method to form a self-aligned CMOS inverter using vertical device integration Electricity 72 Expired
US5667629A Method and apparatus for determination of the end point in chemical mechanical polishing Electricity 64 Expired
US5869396A Method for forming a polycide gate electrode Electricity 53 Expired
US5750435A Method for minimizing the hot carrier effect in N-MOSFET devices Electricity 51 Expired
US6313008A Method to form a balloon shaped STI using a micro machining technique to remove heavily doped silicon Electricity 45 Expired
US8850495B2 Advertisement delivering system based on digital television system and mobile communication device Electricity 42 Active
US5670410A Method of forming integrated CMP stopper and analog capacitor Emerging Cross-Sectional Technologies 41 Expired
US6403485B1 Method to form a low parasitic capacitance pseudo-SOI CMOS device Electricity 38 Expired
US6297106A Transistors with low overlap capacitance Electricity 37 Expired
US5599726A Method of making a conductive spacer lightly doped drain (LDD) for hot carrier effect (HCE) control Electricity 36 Expired
US10600403B2 Transmit operation of an ultrasonic sensor Physics 35 Active
US10706835B2 Transmit beamforming of a two-dimensional array of ultrasonic transducers Performing Operations; Transporting 31 Active
US6417056B1 Method to form low-overlap-capacitance transistors by forming microtrench at the gate edge Electricity 30 Expired
US6406945B1 Method for forming a transistor gate dielectric with high-K and low-K regions Emerging Cross-Sectional Technologies 30 Expired
US6159781A Way to fabricate the self-aligned T-shape gate to reduce gate resistivity Electricity 29 Expired
US5760435A Use of spacers as floating gates in EEPROM with doubled storage efficiency Physics 29 Expired
US8464289B2 Delivering personalized media items to users of interactive television and personal mobile devices by using scrolling tickers Electricity 29 Active
US6306715A Method to form smaller channel with CMOS device by isotropic etching of the gate materials Electricity 27 Expired
US6468877B1 Method to form an air-gap under the edges of a gate electrode by using disposable spacer/liner Electricity 25 Expired
US5831319A Conductive spacer lightly doped drain (LDD) for hot carrier effect (HCE) control Electricity 23 Expired
US5672544A Method for reducing silicided poly gate resistance for very small transistors Emerging Cross-Sectional Technologies 23 Expired

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.