Electronic component package with decoupling capacitors completely within die receiving cavity of substrate
US5831810A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Aug 21, 1996 |
| Grant date | Nov 3, 1998 |
| Priority date | — |
| Expiry date | Aug 21, 2016 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/30105
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An electronic component package comprising a substrate having at least one die-receiving cavity formed therein, the cavity being defined by a die-receiving surface and an inner sidewall having a terraced contour, the substrate having an exterior surface bordering the cavity perimeter, the inner sidewall extending between the die-receiving surface and the substrate exterior surface, and at least one capacitor positioned completely within the cavity and mounted to the terraced contour of the inner sidewall.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.