Overridable data protection mechanism for PLDs
US5838901A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Aug 5, 1996 |
| Grant date | Nov 17, 1998 |
| Priority date | — |
| Expiry date | Aug 5, 2016 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F12/1466
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An overridable data protection mechanism for unlocking/locking a PLD includes a data protect override key register, an input key register, and a comparator. After the user inputs an access code to the input key register, the software program sends an enabling signal to the comparator which in turn compares the bits stored in the data protect override key register and the bits in the input key register. If the bits in the two registers are identical, then the comparator outputs a disable data protect signal, thereby allowing the user to modify the configuration data in that PLD. After an incremented version control number and the new configuration data are downloaded to the PLD, the program sends a disabling signal to the comparator, thereby preventing further modification to the configuration data on that PLD.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.