Out-of-order superscalar microprocessor with a renaming device that maps instructions from memory to registers
US5838941A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Dec 30, 1996 |
| Grant date | Nov 17, 1998 |
| Priority date | — |
| Expiry date | Dec 30, 2016 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/384
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An advanced register renamer comprises an associative memory having a plurality of entries, each entry storing a representation of a single operation as an expression paired with a corresponding name. The expression and the name are respectively stored in first and second fields of an entry in the memory. Both fields are available for subsequent assembly level operations to use as pattern matches. A means for converting a subsequent operation in the stream to a new operation searches for a match between an expression of the subsequent operation and the first field of a matching entry. Upon finding a match with the expression field in the table, the subsequent operation is renamed to a new operation by replacing the expression with the corresponding name field of the matching entry taken from the associative memory.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.