Method of fabricating integrated circuit interconnection employing tungsten/aluminum layers
US5840625A · kind A · utility
34Cited by
0References
7Claims
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Assignee
Inventor
Key dates
| Filing date | Oct 4, 1996 |
| Grant date | Nov 24, 1998 |
| Priority date | — |
| Expiry date | Oct 4, 2016 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An improved integrated circuit interconnection for interconnecting at least two conductive regions within an integrated circuit, and method for producing the same. The interconnection includes a tungsten layer and a barrier layer to provide a low contact resistance within the interconnection and between the conductive regions and the interconnection. The interconnection also includes an aluminum layer for providing a low sheet resistance in the current path between the two conductive regions. Thus the invention combines the advantages of an all tungsten interconnection with those of a tungsten capsuled aluminum interconnection.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.