Method of customizing integrated circuits using standard masks and targeting energy beams for single resist development
US5840627A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Mar 24, 1997 |
| Grant date | Nov 24, 1998 |
| Priority date | — |
| Expiry date | Mar 24, 2017 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S438/94
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method for fabricating custom integrated circuits includes the steps of 1) patterning the layer to be customized with standard precision masking techniques to define all possible connections, vias or cut-points, and 2) using a non-precision targeting energy beam to select the desired connections, vias or cut-points for customization. Consequently, the present invention requires no custom mask so that application specific integrated circuits (ASICs) can be produced with lower lead-time and costs when compared to prior methods. In other embodiments, a non-precision configuration mask may replace the targeting energy beam, where the configuration mask can be made by conventional mask-making techniques or by applying an opaque layer to a mask blank and using a targeting energy beam to selectively remove the desired portions of the opaque areas.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.