Single chip modules, repairable multichip modules, and methods of fabrication thereof
US5841193A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | May 20, 1996 |
| Grant date | Nov 24, 1998 |
| Priority date | — |
| Expiry date | May 20, 2016 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S438/928
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Multichip and single chip modules are presented as well as a chips first fabrication of such modules. The multichip module comprises a plurality of chips affixed in a planar array by a structural material which surrounds the sides of the chips such that the upper surfaces of the chips and an upper surface of the structural material are co-planar and the lower surface of at least one chip and a lower surface of the structural material are co-planar. A photo-patternable dielectric is disposed directly on the upper surfaces of the chips. The photo-patternable dielectric includes vias to at least some contact pads at the upper surfaces of the chips and the module further comprises an intrachip metallization layer on the photo-patternable dielectric layer. Subsequent processing provides a multi-layer chip interconnect structure over the intrachip metallization layer and photo-patternable dielectric. Testing and repair of the module can be accomplished prior to or subsequent to fabrication of the multi-layer chip interconnect. Formation of multiple single chip modules is accomplished by singulating the multichip module into individual packages.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.