Process independent alignment system
US5843831A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jan 13, 1997 |
| Grant date | Dec 1, 1998 |
| Priority date | — |
| Expiry date | Jan 13, 2017 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method is disclosed for aligning wafers independent of the processes to which a wafer is subjected. In prior art, it is found that when aligning wafers from the front or device side, the alignment of the masks vary because of the variations on the topography of the particular layer in process. Since the topography of a layer is influenced by the planarization processes used and by the cumulative effect of the number of underlying features that are disposed on top of each other, severe misalignments can occur causing defective parts. The problem is eliminated by forming alignment marks on the backside of the wafer, and performing alignment with respect to the backside marks by projecting IR energy through an IR transparent stage placed under the backside of the wafer and using an IR microscope. An alignment system capable of performing process independent alignment is also disclosed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.