Thin epitaxy resurf integrated circuit containing high voltage p-channel and n-channel devices with source or drain not tied to ground
US5852314A · kind A · utility
40Cited by
2References
6Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Apr 30, 1996 |
| Grant date | Dec 22, 1998 |
| Priority date | — |
| Expiry date | Apr 30, 2016 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/516
Abstract
N-channel LDMOS and p-channel MOS devices for high voltage integrated in a BiCMOS integrated circuit and exploiting a RESURF condition are provided with a buried region of the same type of conductivity of the epitaxial layer and a doping level intermediate between the doping level of the epitaxial layer and the doping level of a well region. The devices may be configured as source or drain followers without problems.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.