Controlled impedence interposer substrate
US5854534A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Nov 16, 1995 |
| Grant date | Dec 29, 1998 |
| Priority date | — |
| Expiry date | Nov 16, 2015 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH05K2201/10378
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An interposer substrate for mounting an integrated circuit chip to a substrate, and method of making the same, are shown. The interposer substrate comprises power supply paths and controlled impedance signal paths that are substantially isolated from each other. Power supply is routed though rigid segments and signals are routed though a thin film flexible connector that runs from the upper surface of the interposer substrate to the lower surface. Bypass capacitance is incorporated into the interposer substrate and connected to the power supply so that it is positioned very close to the integrated circuit chip. The interposer may be fabricated by forming a multilayered thin film structure including the signal paths over a rigid substrate having vias formed therein, removing the central portion of the substrate leaving the two end segments, and folding and joining the end segments such that the vias are connected. In another embodiment of the invention, a separate power plate is provided for carrying the power lines. Portions of the power plate, with a multilayered thin film structure thereon, are cut and folded to form interposers. Methods of making single-chip interposers are also…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.