High speed FIFO mark and retransmit scheme using latches and precharge
US5860160A · kind A · utility
4Cited by
38References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 18, 1996 |
| Grant date | Jan 12, 1999 |
| Priority date | — |
| Expiry date | Dec 18, 2016 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F7/785
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The present invention provides a look ahead architecture to satisfy the retransmit recovery time constraints in a mark and retransmit system while allowing a full bitline precharge. A number of sense amplifiers are provided in the look ahead architecture that may be equipped with a "shadow latch" to store the read data when the mark pointer is asserted. As a result, the data to be retransmitted will be retrieved from the shadow latches when the retransmit is asserted, allowing a full precharge cycle before reading from the memory array.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.