Semiconductor package and fabrication method
US5866950A · kind A · utility
35Cited by
8References
8Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Nov 14, 1996 |
| Grant date | Feb 2, 1999 |
| Priority date | — |
| Expiry date | Nov 14, 2016 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/30107
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor package comprises a circuit board having a wiring circuit including at least a connecting portion, the wiring circuit being formed on a first main surface of the circuit board, a semiconductor chip mounted on the first main surface of the circuit board on face-down basis, an insulation resin layer filled in a space between the semiconductor chip and the circuit board, and a flat-type external connecting terminal electrically connected to the semiconductor chip and formed and exposed to a second main surface of the circuit board.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.