Semiconductor device for reducing variations in characteristics of the device
US5869858A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Mar 13, 1996 |
| Grant date | Feb 9, 1999 |
| Priority date | — |
| Expiry date | Mar 13, 2016 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/035
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device comprises a substrate, a first conductive layer formed on the substrate and comprising a first layer and a second layer formed on the first layer and having at least one of a convex and a concave, an insulating layer formed on the one of the convex and the concave of the first conductive layer, and a second conductive layer formed opposed to the one of the convex and the concave with the insulating layer interposed therebetween to thereby form a capacitive element with the first conductive layer, the insulating layer having a first region having a first capacitance value per unit area that substantially determines the capacitance value of the capacitive element and a second region having a second capacitance value per unit area that is smaller than the first capacitance value per unit area of the first region, and the second region being formed on the first layer of the conductive layer which is exposed to the one of the convex and the concave.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.