Lateral diffused MOS transistor with trench source contact
US5869875A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Jun 10, 1997 |
| Grant date | Feb 9, 1999 |
| Priority date | — |
| Expiry date | Jun 10, 2017 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/62
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A lateral diffused MOS transistor formed in a doped epitaxial semiconductor layer on a doped semiconductor substrate includes a source contact to the substrate which comprises a trench in the epitaxial layer filled with conductive material such as doped polysilicon, a refractory metal, or a refractory silicide. By providing a plug as part of the source contact, lateral diffusion of the source contact is reduced, thereby reducing overall pitch of the transistor cell. Further, source contact resistance is reduced by the presence of the conductive plug, and the reduced thermal budget requirements in forming the source contact reduces up diffusion from the doped substrate, thereby reducing parasitic capacitance.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.