Structure and fabrication method for stackable, air-gap-containing low epsilon dielectric layers
US5869880A · kind A · utility
54Cited by
4References
13Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Mar 13, 1996 |
| Grant date | Feb 9, 1999 |
| Priority date | — |
| Expiry date | Mar 13, 2016 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A structured dielectric layer and fabrication process for separating wiring levels and wires within a level on a semiconductor chip is described incorporating a lower dielectric layer having narrow air gaps to form dielectric pillars or lines and an upper dielectric layer formed over the pillars or fine lines wherein the air gaps function to substantially reduce the effective dielectric constant of the structured layer. The invention overcomes the problem of solid dielectric layers which would have the higher dielectric constant of the solid material used.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.