Method and apparatus for controlling compensated buffers
US5869983A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Mar 24, 1997 |
| Grant date | Feb 9, 1999 |
| Priority date | — |
| Expiry date | Mar 24, 2017 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/0005
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A method and an apparatus for controlling compensated buffer circuits. In one embodiment, a compensation buffer control circuit includes a compensation unit with a compensation signal memory location such as a compensation register. The compensation unit is configured to produce a local compensation control signal to control a compensated buffer circuit. The compensation signal memory location is configured to selectively receive and store and the local compensation control signal generated by the compensation unit. The contents of the compensation signal memory location may be read, which allows for the external reading of the local compensation signal generated by the compensation unit. In addition, an external write of an external compensation control signal may be performed to the compensation signal memory location such that the output of the compensation unit can be overridden. A compensated buffer circuit is coupled to selectively receive either the local compensation control signal or the external compensation control signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.