Stefan Rusu
146Patents
18h-index
139Co-inventors
89Inventor score
Filing activity: Oct 29, 1990 → Jul 19, 2024
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US6908227B2 | Apparatus for thermal management of multiple core microprocessors | Emerging Cross-Sectional Technologies | 95 | Expired |
| US6707118B2 | Semiconductor-on-insulator resistor-capacitor circuit | Electricity | 94 | Expired |
| US7111178B2 | Method and apparatus for adjusting the voltage and frequency to minimize power dissipation in a multiprocessor system | Emerging Cross-Sectional Technologies | 71 | Expired |
| US6762629B2 | VCC adaptive dynamically variable frequency clock system for high performance low power microprocessors | Emerging Cross-Sectional Technologies | 67 | Expired |
| US5598348A | Method and apparatus for analyzing the power network of a VLSI circuit | Physics | 62 | Expired |
| US6067656A | Method and apparatus for detecting soft errors in content addressable memory arrays | Physics | 59 | Expired |
| US5623420A | Method and apparatus to distribute spare cells within a standard cell region of an integrated circuit | Physics | 50 | Expired |
| US6788156B2 | Adaptive variable frequency clock system for high performance low power microprocessors | Emerging Cross-Sectional Technologies | 44 | Expired |
| US7144152B2 | Apparatus for thermal management of multiple core microprocessors | Emerging Cross-Sectional Technologies | 37 | Expired |
| US6201448A | Method and apparatus to reduce clock jitter of an on-chip clock signal | Electricity | 35 | Expired |
| US5109168A | Method and apparatus for the design and optimization of a balanced tree for clock distribution in computer integrated circuits | Physics | 32 | Expired |
| US6931559B2 | Multiple mode power throttle mechanism | Emerging Cross-Sectional Technologies | 31 | Expired |
| US6608528B2 | Adaptive variable frequency clock system for high performance low power microprocessors | Emerging Cross-Sectional Technologies | 30 | Expired |
| US7464276B2 | Method and apparatus for adjusting the voltage and frequency to minimize power dissipation in a multiprocessor system in response to compute load | Emerging Cross-Sectional Technologies | 25 | Active |
| US5581473A | Method and apparatus for managing timing requirement specifications and confirmations and generating timing models and constraints for a VLSI circuit | Physics | 20 | Expired |
| US7281140B2 | Digital throttle for multiple operating points | Emerging Cross-Sectional Technologies | 19 | Expired |
| US6366129B1 | Method and apparatus for buffering an input-output node of an integrated circuit | Electricity | 18 | Expired |
| US10236209B2 | Passive components in vias in a stacked integrated circuit package | Electricity | 18 | Active |
| US5208764A | Method for optimizing automatic place and route layout for full scan circuits | Physics | 17 | Expired |
| US5869983A | Method and apparatus for controlling compensated buffers | Electricity | 16 | Expired |
| US6092212A | Method and apparatus for driving a strobe signal | Physics | 14 | Expired |
| US5598035A | Integrated circuit package with external storage capacitor for improved signal quality for sensitive integrated circuit elements | Electricity | 12 | Expired |
| US5307286A | Method for optimizing automatic place and route layout for full scan circuits | Physics | 10 | Expired |
| US10326430B2 | Low power flip flop circuit | Electricity | 10 | Active |
| US7038515B2 | Soft-error rate hardened pulsed latch | Electricity | 9 | Expired |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.