On-chip thermometry for control of chip operating temperature
US5873053A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Apr 8, 1997 |
| Grant date | Feb 16, 1999 |
| Priority date | — |
| Expiry date | Apr 8, 2017 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S323/907
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
Temperatures on a chip, including particular regions of a chip are monitored by sensing changes in sub-threshold conduction of a field effect transistor (FET) integrated on the chip due to changes in charge carrier population distribution with temperature therein. Such changes in sub-threshold current with temperature are preferably detected using a current mirror and two FETs with different channel geometry and slightly different gate voltages such that the currents are equal at a specific design temperature. The slightly different gate voltages are conveniently provided by a low current voltage divider with or without on-chip voltage regulation in which resistor ratios can be accurately and repeatably obtained. Variations from that temperature thus yield large current differences and substantial signal swing which improve noise immunity. Hysteresis can be applied to the output (or amplified output) of the current mirror to obtain bistable thermostat-like action. Variant applications provide sensing at plural chip locations (e.g. for sensing temperature gradients and temperatures of autonomously operating portions of the chip) and a plurality of temperatures on the chip. Temperatu…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.