Cache memory
US5873115A · kind A · utility
2Cited by
7References
14Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Oct 23, 1996 |
| Grant date | Feb 16, 1999 |
| Priority date | — |
| Expiry date | Oct 23, 2016 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/3806
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A cache memory has a plurality of cache partitions each having a CAM array, a data RAM and output control circuitry which determines a different priority for each cache partition and permits a cache hit output only from one partition which has the highest priority with a cache hit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.