Peter Cumming
16Patents
7h-index
18Co-inventors
59Inventor score
Filing activity: Oct 23, 1996 → Sep 2, 2014
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US7120771B2 | Secure mode for processors supporting MMU | Physics | 43 | Expired |
| US7237081B2 | Secure mode for processors supporting interrupts | Physics | 39 | Expired |
| US7996581B2 | DMA engine | Physics | 22 | Active |
| US7890753B2 | Secure mode for processors supporting MMU and interrupts | Physics | 22 | Active |
| US5867698A | Apparatus and method for accessing a branch target buffer | Physics | 9 | Expired |
| US5946705A | Avoidance of cache synonyms | Physics | 7 | Expired |
| US6781411B2 | Flip flop with reduced leakage current | Electricity | 7 | Expired |
| US5978908A | Computer instruction supply | Physics | 7 | Expired |
| US6989702B2 | Retention register with normal functionality independent of retention power supply | Physics | 6 | Expired |
| US8024557B2 | Booting an integrated circuit | Physics | 6 | Active |
| US5873115A | Cache memory | Physics | 2 | Expired |
| US8589602B2 | Data transfer engine with delay circuitry for blocking transfers | Physics | 2 | Active |
| US9678529B2 | Efficiency-based clock frequency adjustment | Emerging Cross-Sectional Technologies | 1 | Active |
| US8725999B2 | Booting an integrated circuit | Physics | 1 | Active |
| US8341451B2 | Clock configuration | Physics | 0 | Active |
| US9141165B2 | Method and system for controlling clock frequency for active power management | Emerging Cross-Sectional Technologies | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.