Memory array based data reorganizer
US5873126A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Jul 29, 1997 |
| Grant date | Feb 16, 1999 |
| Priority date | — |
| Expiry date | Jul 29, 2017 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F7/76
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Memory system for internally rearranging fields in database records. The memory is separated into modules, each module separately addressable. Each memory module is addressed by selectively modifying a supplied address, for example by the output from exclusive-OR gates, having inputs from the address supplied to the memory system and another inputs from address modification registers. The address modification registers are selectively set by the external utilization device to permit reading different rows in the memory modules. The data output columns from the memory modules can be rearranged using selector devices such as demultiplexors. Data can be masked by precluding certain selector control signals.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.