Patent · US Expired

Two step source/drain anneal to prevent dopant evaporation

US5874344A · kind A · utility

6Cited by
1References
7Claims
0Family size

Assignee

Inventors

Key dates

Filing dateDec 30, 1996
Grant dateFeb 23, 1999
Priority date—
Expiry dateDec 30, 2016

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH10D30/0227
  • WIPO fieldSemiconductors
  • WIPO sectorElectrical engineering

Abstract

A two step source/drain annealing process which permits a dopant to be ion implanted directly into the silicon without a protective oxide. The gate oxide is removed before the ion implantation of the dopant occurs, thus the dopant is implanted directly into bare silicon. In a first step of the annealing process, a thin oxide is grown over the source and drain regions at a relatively low temperature (e.g., 600.degree. C.) this temperature to prevent the evaporation of the dopant from the silicon substrate and polysilicon gate. The second step of the annealing process occurs at a higher temperature allowing the dopant to be driven into the substrate forming the source and drain regions.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.