Semiconductor memory device for storing data comprising of plural bits and method for operating the same
US5875132A · kind A · utility
27Cited by
9References
10Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Jun 29, 1990 |
| Grant date | Feb 23, 1999 |
| Priority date | — |
| Expiry date | Jun 29, 2010 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C11/4096
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A semiconductor memory device includes a plurality of input/output terminals (I/O1 to I/O4), a plurality of memory cell groups (1 to 4) and a plurality of sense amplifiers (31 to 34). A plurality of decision circuits (81 to 84) and a plurality of selection circuits (91 to 94) are provided in association with the input/output terminals (I/O1 to I/O4). A high voltage is applied to the input/output terminals that are not in use. This fixedly sets the corresponding sense amplifier groups to the non-activated state by means of the corresponding decision circuit and the selection circuit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.