Method and apparatus for maintaining cache coherency in a computer system with a highly pipelined bus and multiple conflicting snoop requests
US5875467A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Apr 4, 1997 |
| Grant date | Feb 23, 1999 |
| Priority date | — |
| Expiry date | Apr 4, 2017 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F12/0833
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method of maintaining cache coherency for snoop operations includes initiating a first snoop operation in response to a snoop request while one or more previous snoop operations are pending in a queue. Furthermore, one or more subsequent snoop operations can be queued, wherein a step of determining if the one or more snoop requests are orthogonal, i.e. the processing of one request is not dependent on the outcome of a previous request, is included. The step of determining if the one or more snoop requests are orthogonal includes utilizing a block bit, a sleep bit, and a plurality of previously pending snoop request bits in a snoop queue entry to determine if the entry is orthogonal or not.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.