Methods of forming integrated circuit capacitors having protected diffusion barrier metal layers therein
US5877062A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Nov 13, 1997 |
| Grant date | Mar 2, 1999 |
| Priority date | — |
| Expiry date | Nov 13, 2017 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D1/692
Abstract
Methods of forming integrated circuit capacitors include the steps of forming an electrically insulating layer having a contact hole therein, on a face of a semiconductor substrate and then forming a polysilicon contact plug in the contact hole. A first capacitor electrode is then formed in electrical contact with the polysilicon contact plug. The first capacitor electrode may be formed by etching a composite of a diffusion barrier metal layer containing a nitride material (or silicide material) and a first electrically conductive layer. Alternatively, the first capacitor electrode may be formed by etching the diffusion barrier metal layer without the first electrically conductive layer thereon. The diffusion barrier metal layer inhibits parasitic migration of silicon from the polysilicon plug to the first electrically conductive layer. A protective layer of a preferred material is then electroplated onto an upper surface and on sidewalls of the first capacitor electrode. The protective layer is designed to protect exposed sidewall portions of the barrier metal layer from being oxidized during subsequent process steps. Next, a capacitor dielectric layer is formed on the protective …
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.