Method for forming oxides on buried N.sup.+ -type regions
US5880009A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Mar 6, 1997 |
| Grant date | Mar 9, 1999 |
| Priority date | — |
| Expiry date | Mar 6, 2017 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/76221
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method for forming oxides on buried N.sup.+ -type regions in a memory cell fabrication process, suitable for forming oxides on the bury N.sup.+ -type regions before self-aligned MOS device etching, comprises: (1) implanting a high concentration of impurity into the buried N.sup.+ -type regions; (2) annealing the chip; and (3) executing a dry oxide process and then a wet oxidation process to the chip, thereby preventing damage to the edges of buried N.sup.+ -type regions caused by non-uniform thickness of oxides on buried regions during self-aligned MOS etching and resolving the problem of non-uniform oxides on buried N.sup.+ -type regions.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.