Process for formation of wiring layer in semiconductor device
US5880023A · kind A · utility
13Cited by
21References
16Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Jan 5, 1996 |
| Grant date | Mar 9, 1999 |
| Priority date | — |
| Expiry date | Jan 5, 2016 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/76877
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method for formation of a wiring layer in a semiconductor device, which includes the steps of: forming a first conductive layer upon a substrate; forming a second conductive layer on the first conductive layer, the second conductive layer having a melting point lower than that of the first conductive layer; and melting (or flowing) the second conductive layer. The first conductive layer is composed of aluminum or an aluminum alloy, and the impurity may be Si or Cu, while the second conductive layer has a melting point lower than that of the first conductive layer by 10.degree. C. or more.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.