MOSFET with a high permitivity gate dielectric
US5880508A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Jul 29, 1998 |
| Grant date | Mar 9, 1999 |
| Priority date | — |
| Expiry date | Jul 29, 2018 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/693
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A transistor formed on a semi-conductor substrate, where the transistor includes a gate dielectric layer formed on the semi-conductor substrate. The gate dielectric layer includes a silicon oxynitride sub-layer formed on the semi-conductor substrate and a dielectric sub-layer having relatively high permitivity to an oxide formed on the silicon oxynitride sub-layer. The transistor also includes a barrier layer formed on the gate dielectric layer and a metal gate is formed on the barrier layer. The gate dielectric layer, the barrier layer and the metal gate combine to form a gate structure. Side walls spacers are formed on side walls of the gate structure, and extended source, drain junctions are formed under the side wall spacers in the semi-conductor substrate and adjacent to the gate structure. The transistor also includes source and drain junctions formed in the gate structure next to the extended source, drain junctions.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.