Inventor · 東區, TW

Shye-Lin Wu

212Patents
37h-index
9Co-inventors
79Inventor score

Filing activity: Sep 2, 1992 → Jun 16, 2006

Most-cited inventions

PatentTitleAreaCited byStatus
US5650351A Method to form a capacitor having multiple pillars for advanced DRAMS Emerging Cross-Sectional Technologies 377 Expired
US5897348A Low mask count self-aligned silicided CMOS transistors with a high electrostatic discharge resistance Electricity 348 Expired
US6063683A Method of fabricating a self-aligned crown-shaped capacitor for high density DRAM cells Electricity 224 Expired
US6770516B2 Method of forming an N channel and P channel FINFET device on the same semiconductor substrate Emerging Cross-Sectional Technologies 149 Expired
US5736446A Method of fabricating a MOS device having a gate-side air-gap structure Emerging Cross-Sectional Technologies 138 Expired
US6096611A Method to fabricate dual threshold CMOS circuits Electricity 137 Expired
US6137152A Planarized deep-shallow trench isolation for CMOS/bipolar devices Electricity 123 Expired
US6001695A Method to form ultra-short channel MOSFET with a gate-side airgap structure Electricity 121 Expired
US6133102A Method of fabricating double poly-gate high density multi-state flat mask ROM cells Electricity 88 Expired
US6251731A Method for fabricating high-density and high-speed nand-type mask roms Electricity 88 Expired
US5989950A Reduced mask CMOS salicided process Electricity 87 Expired
US5994747A MOSFETs with recessed self-aligned silicide gradual S/D junction Electricity 83 Expired
US6136636A Method of manufacturing deep sub-micron CMOS transistors Electricity 72 Expired
US5907782A Method of forming a multiple fin-pillar capacitor for a high density dram cell Electricity 70 Expired
US6114201A Method of manufacturing a multiple fin-shaped capacitor for high density DRAMs Electricity 66 Expired
US5915182A MOSFET with self-aligned silicidation and gate-side air-gap structure Electricity 65 Expired
US5747377A Process for forming shallow trench isolation Emerging Cross-Sectional Technologies 65 Expired
US6034403A High density flat cell mask ROM Electricity 64 Expired
US6294416A Method of fabricating CMOS transistors with self-aligned planarization twin-well by using fewer mask counts Electricity 60 Expired
US5869374A Method to form mosfet with an inverse T-shaped air-gap gate structure Electricity 60 Expired
US5998264A Method of forming high density flash memories with MIM structure Electricity 59 Expired
US5710454A Tungsten silicide polycide gate electrode formed through stacked amorphous silicon (SAS) multi-layer structure. Electricity 58 Expired
US6214696A Method of fabricating deep-shallow trench isolation Electricity 57 Expired
US5902125A Method to form stacked-Si gate pMOSFETs with elevated and extended S/D junction Emerging Cross-Sectional Technologies 56 Expired
US5880508A MOSFET with a high permitivity gate dielectric Electricity 56 Expired

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.