Digital write-and-read method and signal processing apparatus
US5881071A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Mar 6, 1997 |
| Grant date | Mar 9, 1999 |
| Priority date | — |
| Expiry date | Mar 6, 2017 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11B20/1833
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A digital write-and-read method and a signal processing apparatus wherein a write encoder includes a bit distribution circuit for dividing an input data block into n (n: 2 or more) series of bit strings and outputting them in parallel, a first coding circuit for executing predetermined coding for each of data series so distributed and a second coding circuit for converting the output bit series D1 to D3 of the first coding circuit to an n-bit channel code by looking up the previous channel code information, and wherein the second coding circuit executes coding by using a combination having a large Euclidean distance in a partial response equalization output taking inter-symbol interference of at least three bits into consideration as a pair.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.