Computer processor with distributed pipeline control that allows functional units to complete operations out of order while maintaining precise interrupts
US5881265A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jun 5, 1995 |
| Grant date | Mar 9, 1999 |
| Priority date | — |
| Expiry date | Jun 5, 2015 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F15/8053
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A pipeline control system is distributed over the functional units (15, 17, 20, 25) in a processor (10). Decoder logic (12) issues operations, each with an associated tag, to the functional units, with up to n operations allowed to be outstanding. The units execute the operations and report termination information back to the decoder logic, but do not irrevocably change the state of the machine. Based on the termination information, the decoder logic retires normally terminated operations in order. If an operation terminates abnormally, the decoder logic instructs the units to back out of those operations that include and are later than the operation that terminated abnormally.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.