Multiprocessing system configured to perform prefetch coherency activity with separate reissue queue for each processing subnode
US5881303A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jul 1, 1996 |
| Grant date | Mar 9, 1999 |
| Priority date | — |
| Expiry date | Jul 1, 2016 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/507
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A computer system includes multiple processing nodes, each of which is divided into subnodes. Transactions from a particular subnode are performed in the order presented by that subnode. Therefore, when a first transaction from the subnode is delayed to allow performance of coherency activity with other processing nodes, subsequent transactions from that subnode are delayed as well. Additionally, coherency activity for the subsequent transactions may be initiated in accordance with a prefetch method assigned to the subsequent transactions. In this manner, the delay associated with the ordering constraints of the system may be concurrently experienced with the delay associated with any coherency activity which may need to be performed in response to the subsequent transactions. In order to respect the ordering constraints imposed by the computer system, a system interface within the processing nodes employs an early completion policy for prefetch operations. If prefetch coherency activity for a transaction completes prior to coherency activity for another transaction from the same subnode, the early completion policy assigned to that transaction is enacted. In a drop policy, the dat…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.