Inventor · Palo Alto, CA, US

Paul N. Loewenstein

46Patents
13h-index
53Co-inventors
84Inventor score

Filing activity: Aug 6, 1975 → Jun 29, 2022

Most-cited inventions

PatentTitleAreaCited byStatus
US5655100A Transaction activation processor for controlling memory transaction execution in a packet switched cache coherent multiprocessor system Physics 275 Expired
US5887138A Multiprocessing computer system employing local and global address spaces and COMA and NUMA access modes Physics 117 Expired
US5905998A Transaction activation processor for controlling memory transaction processing in a packet switched cache coherent multiprocessor system Physics 110 Expired
US5581729A Parallelized coherent read and writeback transaction processing system for use in a packet switched cache coherent multiprocessor system Physics 92 Expired
US5684977A Writeback cancellation processing system for use in a packet switched cache coherent multiprocessor system Physics 88 Expired
US6141692A Directory-based, shared-memory, scaleable multiprocessor computer system having deadlock-free transaction flow sans flow control protocol Physics 73 Expired
US5862316A Multiprocessing system having coherency-related error logging capabilities Emerging Cross-Sectional Technologies 61 Expired
US5983326A Multiprocessing system including an enhanced blocking mechanism for read-to-share-transactions in a NUMA mode Physics 50 Expired
US5881303A Multiprocessing system configured to perform prefetch coherency activity with separate reissue queue for each processing subnode Physics 39 Expired
US5897657A Multiprocessing system employing a coherency protocol including a reply count Physics 32 Expired
US5950226A Multiprocessing system employing a three-hop communication protocol Physics 27 Expired
US5893160A Deterministic distributed multi-cache coherence method and system Physics 25 Expired
US4560922A Method for determining the direction of the origin of a disturbance affecting an element of an electrical energy transfer network Electricity 13 Expired
US4366474A Identification of electric power network phases experiencing disturbances Electricity 11 Expired
US7657710B2 Cache coherence protocol with write-only permission Physics 11 Active
US7325101B1 Techniques for reducing off-chip cache memory accesses Physics 9 Expired
US7480771B2 Conditional synchronization mechanisms allowing multiple store operations to become visible while a flagged memory location is owned and remains unchanged Physics 9 Active
US9110718B2 Supporting targeted stores in a shared-memory multiprocessor system Physics 6 Active
US4568872A Method of measuring the distance of a fault on a line taking account of distributed capacitances Electricity 6 Expired
US4032797A Quantising circuit Electricity 5 Expired
US9367472B2 Observation of data in persistent memory Physics 5 Active
US8812935B2 Using a data ECC to detect address corruption Electricity 3 Active
US10423482B2 Robust pin-correcting error-correcting code Electricity 3 Active
US7680989B2 Instruction set architecture employing conditional multistore synchronization Physics 3 Active
US10999401B2 Multiple on-die communication networks Electricity 1 Active

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.