Multi-layer solder seal band for semiconductor substrates and process
US5881945A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Apr 30, 1997 |
| Grant date | Mar 16, 1999 |
| Priority date | — |
| Expiry date | Apr 30, 2017 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/16152
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The present invention relates generally to a new scheme of providing a seal band for semi-conductor substrates and chip carriers. More particularly, the invention encompasses a structure and a method that uses a multi-layer metallic seal to provide protection to chips on a chip carrier. This multi-layer metal seal provides both enhanced hermeticity lifetime and environmental protection. For the preferred embodiment the multi-layer metallic seal band is a three layer, solder sandwich structure which is used to create a low cost, high reliability, hermetic seal for the module. This solder sandwich has a high melting temperature thick solder inner core, and lower melting point thin interconnecting solder layers, where the thin interconnecting solder layers may have similar or different melting points.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.