Voltage multiplier with low threshold voltage sensitivity
US5886887A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Mar 26, 1998 |
| Grant date | Mar 23, 1999 |
| Priority date | — |
| Expiry date | Mar 26, 2018 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH02M3/073
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
A voltage multiplier has a number of electrically-like stages. Each of the stages receives two input signals and a pump signal. The stage has an MOS transistor with a first source/drain region and a second source/drain region and a gate. Each stage also has means for receiving a pump signal and for separately pumping the first source/drain region and the gate of the first transistor by the pump signal. The two input signals are supplied to the first source/drain region and the gate of the first transistor, respectively. A first output signal is supplied from the second source/drain region of the first transistor, and from the first source/drain region of the first transistor. A voltage signal is supplied as the input signal of the first stage and a clock signal having a first phase is supplied to the first stage as the pump signal of the first stage. The first and second output signals of the first stage are supplied to the second stage as the input signals of the second stage and a clock signal having a second phase different from the first phase is supplied to the second stage as the pump signal of the second stage.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.