Nonvolatile memory device with verify function
US5886927A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Jul 9, 1998 |
| Grant date | Mar 23, 1999 |
| Priority date | — |
| Expiry date | Jul 9, 2018 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/3459
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
One verify cell is connected to one word line, together with a plurality of array cells, and has a threshold value almost the same as the array cells. A write voltage or an erase voltage is applied to the array cells, setting the voltage applied to the verify cell at a small value, thereby electrically changing the threshold value of the verify cell. Alternatively, the sense ratio of a sense amplifier is changed with respect to the output of the verify cell and the output of a reference cell, thereby electrically changing the apparent threshold value of the verify cell. Data is thereby written into or erased from the array cells earlier than into or from the verify cell. Hence, the verification of the memory cells is accomplished by when the verify cell is verified.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.