Vertex based geometry engine system for use in integrated circuit design
US5887155A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Jul 25, 1996 |
| Grant date | Mar 23, 1999 |
| Priority date | — |
| Expiry date | Jul 25, 2016 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F30/398
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A system and method for processing geometry is provided which reduces the amount of memory needed for processing the geometry while improving the processing speed. The system and method deliver vertices in sequence to a vertex queue so that data in the vertex queue is freed as it is delivered and only minimal intermediate results are stored. By this incremental evaluation, less memory space is needed because input data is freed as it is used to compute results so that only small portions of intermediate results exist at any time. In another aspect of the present system and method, the vertices are maintained in the proper sequence so that sorting operations can be eliminated. More particularly, a sorted vertex queue and an unsorted vertex list are utilized so that resorting of the entire vertex list may be prevented. The use of sorted vertex queue and unsorted vertex lists are particularly useful when reading or collecting input data by allowing data to be efficiently stored and managed. In addition, a compressed format for storing geometry is utilized based on the fact that much information can be rederived from a sorted and reduced vertex queue.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.