Bulk silicon voltage plane for SOI applications
US5889306A · kind A · utility
28Cited by
6References
23Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jan 10, 1997 |
| Grant date | Mar 30, 1999 |
| Priority date | — |
| Expiry date | Jan 10, 2017 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D86/201
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device including a conductive substrate, an insulator layer, a silicon layer doped with impurities and forming a first transistor and a second transistor, an isolation volume between said first transistor and said second transistor, and a conductive stud extending from the doped silicon layer to the substrate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.