Boundary-scan circuit for use with linearized impedance control type output drivers
US5892778A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jun 30, 1997 |
| Grant date | Apr 6, 1999 |
| Priority date | — |
| Expiry date | Jun 30, 2017 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R31/31715
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A circuit for coupling a LIC driver to a IEEE 1149.1 boundary scan implementation includes a logic circuit that converts the data and oe signals of the IEEE 1149.1 specification to test "q.sub.-- up" and "q.sub.-- dn" signals meeting the requirements of the LIC driver. These test "q.sub.-- up" and "q.sub.-- dn" signals are selectively provided to the LIC driver during boundary scan testing of the output driver. In a further refinement, the logic circuit also converts functional q.sub.-- up and q.sub.-- dn signals provided by the circuit under test to the data and oe signals of the IEEE 1149.1 specification. The logic circuit allows the widely used IEEE 1149.1 boundary scan standard to be used with LIC drivers. The resulting compatibility simplifies the testing and use of the LIC drivers, and provides a new boundary scan standard for use with LIC drivers that is compliant with the IEEE 1149.1 standard.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.