Intermediate frequency gain stage with rectifier
US5893028A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jan 8, 1997 |
| Grant date | Apr 6, 1999 |
| Priority date | — |
| Expiry date | Jan 8, 2017 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03F3/45192
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An intermediate frequency gain and rectifying stage for an IF system is implemented with a high swing folded-casecode structure terminated into a current-mirror load. The signal-path outputs are derived from the current-mirror loads, and the rectification and current-limiting RSSI functions are performed with two additional constant-current sources and two additional current-mirror loads. One load current from one leg or current path of the signal-path gain-stage is mirrored into a constant-current source and a second current-mirror structure. A second leg or current path of the signal-path gain-stage is likewise mirrored into yet another constant-current source and another current-mirror structure. When the input signal is not present, the load currents in the signal-path gain-stage are equal and the rectified output signal on an output node IOUT is constant or set to zero. With a differential input signal present, the load currents in the signal-path gain-stage produce a plus delta-current and minus delta-current. The plus delta-current, which represents a difference between the current in one of the legs of the signal-path gain-stage and the current of a corresponding constant c…
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