System and method for using random access memory in a programmable interrupt controller
US5894578A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Dec 19, 1995 |
| Grant date | Apr 13, 1999 |
| Priority date | — |
| Expiry date | Dec 19, 2015 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/24
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A programmable interrupt controller for use in computer systems including one or more CPUs is provided. The programmable interrupt controller includes an interrupt request interface, a central interrupt controller, random access memory, and at least one processor interface. The central interrupt controller systematically selects interrupt requests from the interrupt request interface. Information associated with each interrupt request is stored in the random access memory. The central interrupt controller access the information in the random access memory and uses the information and the state of the currently selected interrupt request to determine a next state for the currently selected interrupt request. The information is passed on to the processor interface to determine when and if the interrupt request should issue to one of the CPUs.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.