Semiconductor package bond post configuration
US5898213A · kind A · utility
14Cited by
14References
21Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jul 7, 1997 |
| Grant date | Apr 27, 1999 |
| Priority date | — |
| Expiry date | Jul 7, 2017 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/181
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A bond post configuration for wire bonded semiconductors has bond posts grouped in three posts where two are arranged closely to a side of a die about a first axis and a third is arranged in between and further removed from the side about a second axis. In one form, the bond post configuration is a radial configuration. Additionally, conductive traces which extend from the bond posts and away from the die are placed off-center from the the bond posts about the first axis to provide more placement area for the bond posts arranged about the second axis. The bond post configuration may be utilized in any wire bonded semiconductor.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.