Programmable interconnect point having reduced crowbar current
US5898320A · kind A · utility
5Cited by
1References
6Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Mar 27, 1997 |
| Grant date | Apr 27, 1999 |
| Priority date | — |
| Expiry date | Mar 27, 2017 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/00361
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
Problems associated with excessive crowbar current due to input signal transitions at a buffered programmable interconnect point are solved by inserting a transistor switch between power and ground. The inserted switch is in series with the input buffer and is controlled by a memory cell which also controls the pass/no-pass state of the interconnect. An OFF inserted switch blocks current that flows during switching when the memory cell output causes a no-pass state of the interconnect.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.