Method for operating a ferroelectric memory
US5898608A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jan 23, 1997 |
| Grant date | Apr 27, 1999 |
| Priority date | — |
| Expiry date | Jan 23, 2017 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C11/22
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
In a ferroelectric memory of 1T1C configuration in which a memory cell consists of 1 transistor and 1 capacitor per bit, the capacitance of a dummy memory cell capacitor, i.e., the area occupied by the dummy memory cell capacitor is determined based on the capacitive characteristic of a main memory cell capacitor obtained when the main memory cell capacitor was repeatedly operated with both positive voltage and negative voltage until its capacitive characteristic presented no more change. Moreover, not only the main memory cell capacitor but also the dummy memory cell capacitor are operated with both positive voltage and negative voltage by using a power-source voltage, not a ground voltage, as a voltage for resetting the dummy memory cell capacitor. Consequently, the effect of an imprint on the ferroelectric capacitor is reduced, thereby preventing the malfunction of the ferroelectric memory.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.