Method for detecting bus shorts in semiconductor devices
US5898705A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Dec 23, 1996 |
| Grant date | Apr 27, 1999 |
| Priority date | — |
| Expiry date | Dec 23, 2016 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F11/263
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method is provided for generating test vectors to detect bridge faults in a semiconductor device. In one version of the invention, the method includes the steps of creating a net name data structure from a structural description of the semiconductor device which includes data representing the instance names for the nets to be tested, identifying a pair of nets in the net name data structure, and generating at least one test vector for the pair of nets such that, when the vectors impress on the nets, the state of the nets of the pair will change relative to each other such that logic, coupled to the pair, produces a signal which indicates whether a bridge fault exists between the nets of the pair.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.