Stefan Graef
25Patents
10h-index
13Co-inventors
68Inventor score
Filing activity: Oct 8, 1996 → Sep 22, 2009
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US6714828B2 | Method and system for designing a probe card | Physics | 75 | Expired |
| US6189131A | Method of selecting and synthesizing metal interconnect wires in integrated circuits | Physics | 71 | Expired |
| US6305001A | Clock distribution network planning and method therefor | Physics | 57 | Expired |
| US6083269A | Digital integrated circuit design system and methodology with hardware | Physics | 43 | Expired |
| US6101329A | System for comparing counter blocks and flag registers to determine whether FIFO buffer can send or receive data | Physics | 42 | Expired |
| US5974248A | Intermediate test file conversion and comparison | Physics | 27 | Expired |
| US6546538B1 | Integrated circuit having on-chip capacitors for supplying power to portions of the circuit requiring high-transient peak power | Physics | 20 | Expired |
| US7092902B2 | Automated system for designing and testing a probe card | Physics | 19 | Expired |
| US6131151A | Processing high-speed digital datastreams with reduced memory | Electricity | 14 | Expired |
| US6184711A | Low impact signal buffering in integrated circuits | Electricity | 13 | Expired |
| US6532576B1 | Cell interconnect delay library for integrated circuit design | Physics | 10 | Expired |
| US5831993A | Method and apparatus for scan chain with reduced delay penalty | Physics | 10 | Expired |
| US6634014B1 | Delay/load estimation for use in integrated circuit design | Physics | 9 | Expired |
| US6064220A | Semiconductor integrated circuit failure analysis using magnetic imaging | Physics | 9 | Expired |
| US5898705A | Method for detecting bus shorts in semiconductor devices | Physics | 6 | Expired |
| US6037796A | Current waveform analysis for testing semiconductor devices | Physics | 5 | Expired |
| US6766499B1 | Buffer cell insertion and electronic design automation | Physics | 5 | Expired |
| US6502230B1 | Circuit modeling | Physics | 4 | Expired |
| US7593872B2 | Method and system for designing a probe card | Physics | 4 | Active |
| US6102962A | Method for estimating quiescent current in integrated circuits | Physics | 3 | Expired |
| US6598213B1 | Static timing analysis validation tool for ASIC cores | Physics | 3 | Expired |
| US6457160B1 | Iterative prediction of circuit delays | Physics | 3 | Expired |
| US5771267A | Burn-in activity monitor | Physics | 2 | Expired |
| US6687661B1 | Utilizing a technology-independent system description incorporating a metal layer dependent attribute | Physics | 1 | Expired |
| US7930219B2 | Method and system for designing a probe card | Physics | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.