System and method for performing software patches in embedded systems
US5901225A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Dec 5, 1996 |
| Grant date | May 4, 1999 |
| Priority date | — |
| Expiry date | Dec 5, 2016 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F8/66
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A system and method for performing software patches for embedded system devices in which the firmware of the system is included in non-alterable storage of the device. The patch mechanism provides a means for finding firmware errors, prototyping fixes to the errors and/or prototyping new functionality of the firmware of the embedded system. The system comprises an embedded system device coupled to an external memory. The device includes a non-alterable memory, including firmware, coupled to a processor. The device further includes a relatively small amount of patch RAM within the device also coupled to the processor. The patches are loaded from the external memory into the patch RAM. The device further includes a means for determining if one or more patches are to be applied. If the device detects a patch to be applied, the system loads the patch from the external memory into the patch RAM. The device also includes a breakpoint register. When the value of the program counter of the processor equals the value in the breakpoint register, a patch insertion occurs, i.e., the processor deviates from executing firmware to executing patch instructions. Preferably, the embedded system devi…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.