Power device integration for built-in ESD robustness
US5903032A · kind A · utility
27Cited by
2References
19Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Feb 10, 1997 |
| Grant date | May 11, 1999 |
| Priority date | — |
| Expiry date | Feb 10, 2017 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
Abstract
A power device having built-in ESD protection. A drain extended NMOS transistor (12) is located in a tank region (18). A silicon controlled rectifier (14) is merged with the drain extended nMOS (12) into the tank region (18). In one aspect of the invention, an anode (28) of the silicon controlled rectifier (14) is connected to a drain (24) of the drain extended nMOS (12) and a cathode (32) of the silicon controlled rectifier (14) is connected to a source (34) of the drain extended nMOS (12).
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.