Integrated program verify page buffer
US5903497A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Dec 22, 1997 |
| Grant date | May 11, 1999 |
| Priority date | — |
| Expiry date | Dec 22, 2017 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2216/14
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A semiconductor memory includes a plurality of memory cells and a corresponding plurality of page buffers. When writing to a selected row of cells, input data is first latched into the page buffers. The cells in the selected row are then programmed according to the data latched within the page buffers. After programming, data stored in the cells is forwarded to the corresponding page buffers. If, for each cell, the data stored in the cell matches the data latched in its corresponding page buffer, the page buffer is reset. The selected row of cells are subsequently re-programmed, whereby only cells corresponding to those page buffers which have not been reset are re-programmed. In this manner, cells properly programmed during the first program operation are not re-programmed during program verify operations.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.